1. Field of the Invention
This invention relates generally to input/output processing for computer systems, and more specifically to a network input/output architecture for a computer system that supports message transfers to and from computer networks.
2. Background Information
The efficient performance of input and output operations is one of the most critical requirements for computer system design. Contemporary large-scale computer systems typically interface with many different attached peripheral devices such as magnetic disk drives, optical disk drives, magnetic tape drives, cartridge tape libraries, and the like. Thus, a robust yet efficient mechanism must be provided to send output to and receive input from such devices. The operating system software of the computer system, together with the other software and microcode controlling the peripheral devices, must provide the application programmer with sufficient software interfaces so that the application program can implement its desired functionality. Input/Output (I/O) control systems are well known in the art for providing common interfaces to the various peripheral devices attached to the computer system. For an overview of I/O Control Systems and I/O instructions, the reader is directed to consult "The Encyclopedia of Computer Science," Third Edition, Anthony Ralston and Edwin D. Reilly, ed., pp. 672-80. One implementation of an I/O control system is known as an I/O Processor. An I/O processor is a specialized processing unit in the computer system that is dedicated to performing I/O functions to and from the attached peripheral devices. The presence of the I/O processor improves overall system performance because it relieves the Central Processing Unit (CPU) or other Instruction Processors (IPs) from much of the processing overhead associated with I/O operations. In some large scale systems, there may be many I/O Processors, each connected to a subset of the entire system's set of peripheral devices. The I/O Processor may, in conjunction with the operating system, support a secure, protected interface to the supported I/O functions for the benefit of the application programs being executed by the computer system. The I/O Processor detects I/O request-related errors and ensures that the application program cannot corrupt the I/O resources of the computer system. This protection is not without a cost, however. The overhead required to perform the extra error-checking detracts from the system's performance.
For communicating over communications networks such as Local Area Networks (LANs), Metropolitan Area Networks (MANs), and Wide Area Networks (WANs), most large scale computer systems use dedicated outboard communications processors such as the Distributed Communications Processor (DCP), commercially available from Unisys Corporation. These communications processors allow the application program running on the computer system to exchange data at a relatively high rate of speed with other computer systems, but at the cost of processing overhead due to the control and interface aspects of the computer system/communications processor linkage. Furthermore, a costly extra piece of equipment, the communications processor, is required to provide efficient communications I/O for the computer system.
A design approach providing access to communications networks and attached peripheral devices is desired. The preferred architectural solution would feature low overhead for communications processing with communications networks, and would provide support for high speed access to the attached peripheral devices with the necessary error detection capabilities. This solution should minimize the operating system overhead and I/0 hardware/microcode overhead for communications I/O. In addition, it should eliminate the need for an outboard communications processor, thereby making the computer system less expensive. The integrated approach should also minimize the latency time of messages transferred to and from the network, thus increasing overall system performance. The present invention fulfills the above requirements for dramatically improving large scale computer system I/O performance.